1. Field of the Invention
The present invention relates to integrated structure bipolar transistors with a controlled storage time, and a manufacturing process for obtaining such devices.
2. Discussion of the Related Art
In bipolar transistors, the "storage time" is a parameter defining the time necessary for the device to move from the saturation region to the active region, and depends on the biasing conditions and on the minority carrier lifetime in the base and collector regions of the transistor.
In several applications, such as lamp ballast circuits, it is advantageous to use power a bipolar transistors with a highly controlled storage time, in order to avoid adverse affects on the circuit oscillation frequency and the power delivered to the load. In view of such applications, the manufacturers make available different selections of transistors with guaranteed storage time values, with tolerances normally limited to 20% of the specified value.
One way to assure such a fine tuning of the storage time is to prevent the bipolar transistor from being driven into deep saturation, by means of circuital techniques such as those described in the European Patent Application No. 93830261.9.
Another way is to make use of techniques for controlling the minority carrier lifetime. In the practice, this means reducing the minority carrier lifetime from about 30 .mu.s to 10-20 .mu.s, depending on the specific application.
One known lifetime-control technique calls for exposing the device to electron radiation. In this technique, silicon atoms in the lattice are displaced from their sites, and deep energy levels are introduced in the silicon energy band gap. Such deep energy levels cause a variation of the minority carrier lifetime, which can therefore be controlled.
However, this technique has some limitations. First, electron-hole pairs are created at the interface between the silicon surface and the silicon dioxide layer, reducing the device reliability. Second, the damage produced in the lattice by the displacement of silicon atoms from their sites is unstable and varies with temperature and time. In fact, submitting the device to temperatures in the range of 280.degree.-400.degree. C. will re-establish in the lattice the conditions that existed before the exposure to the electron radiation, thereby destroying the controlled storage time. This is because during its packaging the device is submitted to a thermal process ("die attach") at temperatures ranging from approximately 300.degree. C. to 350.degree. C., and therefore the precision of the minority carrier lifetime tuning is compromised.
Another known lifetime-control technique calls for the introduction of platinum atoms. In this technique, the tuning of the minority carrier lifetime thus achieved is not affected even if the device is successively submitted to temperatures ranging from approximately 400.degree. C. to 600.degree. C.
The minority carrier lifetime .tau. is normally related to the dose of platinum atoms introduced into the silicon by the following equation: EQU (1/.tau.)-(1/.tau. 0)=K.sub.Pt .times.D
where .tau. 0 is the minority carrier lifetime before the introduction of platinum atoms, K.sub.Pt is a constant for platinum, and D is the dose of platinum atoms introduced. It is therefore necessary to introduce extremely low doses of platinum atoms, ranging from 10.sup.10 to 10.sup.11 atoms/cm.sup.2, since for doses of the order of 10.sup.12 atoms/cm.sup.2 the minority carrier lifetime falls to values of some microseconds, which are too low for the applications under consideration. Such low doses cannot be statistically reproduced by any known implanting industrial apparatus. In fact, the dispersion between different implants could be higher than 50%, and would make the technique disadvantageous to be industrialized. The introduction of platinum atoms by means of the deposition technique is even more inadequate to achieve such low doses.